System-on-Chip Test Architectures (Record no. 13782)

MARC details
000 -LEADER
fixed length control field 00843nam a2200193Ia 4500
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 210820s2008||||xx |||||||||||||| ||und||
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
ISBN 9780080556802
041 ## - LANGUAGE CODE
Language code of text/sound track or separate title eng
082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER
Classification number 621.39/5
100 ## - MAIN ENTRY--AUTHOR NAME
Personal name Laung-Terng Wang-Charles E. Stroud-Nur A. Touba
245 #0 - TITLE STATEMENT
Title System-on-Chip Test Architectures
Remainder of title Nanometer Design for Testability
260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT)
Name of publisher Morgan Kaufmann
Year of publication 2008
490 ## - SERIES STATEMENT
Series statement The Morgan Kaufmann Series in Systems on Silicon
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical Term Integrated circuits--Very large scale integration--Design.,Integrated circuits--Very large scale integration--Testing.,Systems on a chip--Testing.
653 ## - INDEX TERM--UNCONTROLLED
Uncontrolled term TECHNOLOGY & ENGINEERING / Industrial Design / Product
856 ## - ELECTRONIC LOCATION AND ACCESS
Uniform Resource Identifier https://search.ebscohost.com/login.aspx?direct=true&db=e230xww&scope=site&site=ehost-live&AN=214796
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type E-Books
Holdings
Withdrawn status Home library Current library Date acquired Koha item type
  VJEC Central Library VJEC Central Library 20/08/2021 E-Books
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