Verification Techniques for System-Level Design
Material type: TextLanguage: English Series: The Morgan Kaufmann Series in Systems on SiliconPublication details: Morgan Kaufmann 2008 ISBN: 9780080553139Subject(s): Formal methods (Computer science),Integrated circuits--Verification.,Systems on a chip--Testing | TECHNOLOGY & ENGINEERING / Industrial Design / ProductDDC classification: 621.3815 LOC classification: TK7895.E42 F95 2008ebOnline resources: Click here to access onlineItem type | Current library | Call number | Status | Date due | Barcode |
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E-Books | VJEC Central Library | Not for loan |
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