Wafer-level Testing and Test During Burn-in for Integrated Circuits
Material type: TextLanguage: English Series: Artech House Integrated Microsystems SeriesPublication details: Artech House, Inc. 2010 ISBN: 9781596939905Subject(s): Integrated circuits--Testing.,Integrated circuits--Wafer-scale integration.,Semiconductors--Testing | TECHNOLOGY & ENGINEERING / Electronics / MicroelectronicsDDC classification: 621.381 LOC classification: TK7874 .B35 2010Online resources: Click here to access onlineItem type | Current library | Call number | Status | Date due | Barcode |
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E-Books | VJEC Central Library | Not for loan |
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